Sarita Adve's Research Group
University of Illinois at Urbana-Champaign


  • Our paper titled "Chasing Away RAts: Semantics and Evaluation for Relaxed Atomics on Heterogeneous Systems" has been accepted for publication at ISCA 2017!

  • Sarita gave a keynote speech at HiPEAC 2017 in Stockholm. Watch the full keynote here!

  • Released Approxilyzer to the open source community! Check it out!

  • Our paper titled "Lazy Release Consistency for GPUs" has been accepted for publication at MICRO 2016!

  • Our paper titled "Approxilyzer: Towards A Systematic Framework for Instruction-Level Approximate Computing and its Applications to Hardware Resiliency" has been accepted for publication at MICRO 2016!

  • Congratulations to John Alsop for depositing his M.S. thesis, April 2016!

  • John presented at ISPASS, April 2016.

  • Matt was selected as a participent in the 4th Heidelberg Laureate Forum, April 2016!

  • Matt and Huzaifa received the Feng Chen Memorial Award in 2016!

  • Matt received the Mavis Future Faculty Fellowship Award again for 2016-2017!

  • Radha presented at WAX, April, 2016.

  • Abdulrahman was recognized as an Outstanding Teaching Assistant for the Fall 2015 semester!

  • Abdulrahman passed the PhD qualifying exam, March 2016!

  • Our paper titled "Towards more Precision in Approximate Computing" has been accepted for publication at WAX 2016!

  • John received the Dan Vivoli Endowed Fellowship for 2016!

  • Our paper titled "Characterizing the Sources of Memory Stalls for Tightly Coupled GPUs" has been accepted for publication at ISPASS 2016!

  • Our Stash and Scopes papers were both awarded Honorable Mentions in IEEE Micro Top Picks 2016!

  • Sarita was elected as SIGARCH Chair!

  • Matt presented at MICRO 2015, December 2015.

  • Our work on Stash has been covered in the CCC blog!

  • Our paper titled "Efficient GPU Synchronization without Scopes: Saying No to Complex Consistency Models" has been accepted for publication at MICRO 2015!

     News Archive


  • Memory consistency models: Co-developed the memory models for the C++ and Java programming languages, based on our early work on data-race-free models

  • Hardware reliability: co-developed the concept of lifetime reliability aware architectures and dynamic reliability management

  • Power management: Co-designed GRACE, one of the first systems to implement cross-layer energy management

  • Memory level parallelism: Some of the first papers on exploiting instruction-level parallelism (ILP) for memory system performance

  • Evaluation techniques for shared-memory systems with ILP processors: Developed the widely used RSIM architecture simulator

Our group's research focus is in computer architecture, but we take a full system view of the problems we solve and collaborate closely with faculty and students from other areas, including applications, software, and hardware.

The field of computer architecture is currently undergoing several disruptive changes. Moore's law continues to bestow a wealth of transistors, but converting them into usable performance will require exploiting increasingly higher levels of parallelism or many-core computing. Designing parallel hardware and software that achieve power-efficient, reliable, and scalable performance, however, remains a challenge. We are currently working on the following projects to address this challenge:

    SWAT: Software Anomaly Treatment
    DeNovo: Rethinking Hardware for Disciplined Parallelism
    DPJ: Deterministic Parallel Java (led by Vikram Adve)
    Heterogeneous Computing (joint project with Vikram Adve)


Sarita Adve's Group Picture

(front) Abdulrahman Mahmoud, Khalique Ahmed, Sarita Adve, and Matt Sinclair,

(back) Lin Cheng, Gio Salvador, Muhammad Huzaifa, Radha Venkatagiri, John Alsop