Graduate Student, Computer Architecture
Computer Architecture, Processor Microarchitecture, Memory Consistency, Cache Coherence, Memory Systems, Mobile Computing, Parallel Algorithms
I have graduated and am currently a post-doc at AMD Research.
In August 2018, I will be joining the Computer Science Department at the University of
Wisconsin-Madison as an Assistant Professor!
My research focuses on building efficient memory hierarchies for tightly coupled
heterogeneous systems, especially for emerging applications like graph
analytics applications and applications with fine-grained synchronization. My
work improves performance and energy efficiency for these applications
by designing more efficient coherence protocols, consistency models, and memory
organizations. Two of my papers on this topic were recognized as IEEE Micro Top Picks
Honorable Mentions. I have also received
several fellowships and awards for my work, including a
Qualcomm Innovation Fellowship,
Future Faculty Fellowships, a Feng Chen Memorial Award, and W.J.
Poppelbaum Award, and Saburo Muroga Fellowship.
I was also selected to attend and present a poster on this work at the
2016 Heidelberg Laureate Forum.
B.S. Computer Engineering, University of Wisconsin-Madison. December 2009.
B.S. Computer Science with Honors, University of Wisconsin-Madison. December 2009.
M.S. Electrical Engineering (Concentration: Computer Architecture), University of Wisconsin-Madison. May 2011.
PhD. Computer Science (Concentration: Computer Architecture), University of Illinois @ Urbana-Champaign, August 2017.