Virtual Instruction Set Computing for Heterogeneous Systems

Vikram Adve, Sarita Adve, Rakesh Komuravelli, Matthew D. Sinclair and Prakalp Srivastava

Abstract:

Developing software applications for emerging and future heterogeneous systems with diverse combinations of hardware is signi´Čücantly harder than for homogeneous multicore systems. In this paper, we identify three root causes that underlie the programming challenges: (1) diverse parallelism models; (2) diverse memory architectures; and (3) diverse hardware instruction set semantics. We believe that these issues must be addressed using a language-neutral, virtual instruction set layer that abstracts away most of the low-level details of hardware, an approach we call Virtual Instruction Set Computing. Most importantly, the virtual instruction set must abstract away and unify the diverse forms of parallelism and memory architectures using only one or two models of parallelism. We discuss how this approach can solve the root causes of the programmability challenges, illustrate the design with an example, and discuss the research challenges that arise in realizing this vision.

Published:

"Virtual Instruction Set Computing for Heterogeneous Systems", Vikram Adve, Sarita Adve, Rakesh Komuravelli, Matthew D. Sinclair and Prakalp Srivastava.
Proceedings of the 4th USENIX Workshop on Hot Topics in Parallelism (HotPar'12), Berkeley, California, June 2012.

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BibTeX Entry:

  @InProceedings{VISC:HOTPAR12,
    author    = {Vikram Adve, Sarita Adve, Rakesh Komuravelli, Matthew D. Sinclair and Prakalp Srivastava},
    title     = "{Virtual Instruction Set Computing for Heterogeneous Systems}",
    booktitle = "{Proceedings of the 2012 4th USENIX Workshop on Hot Topics in Parallelism (HotPar'12)}",
    address   = {Berkeley, California},
    month     = {June},
    year      = {2012}
  }