RSIM Project Publications

• Comparing and Combining Read Miss Clustering and Software Prefetching, V. S. Pai and S. V. Adve. To appear in the Proceedings of the International Symposium on Parallel Architectures and Compilation Techniques, September 2001.
  
  
• Memory Side Prefetching for Linked Data Structures, C. J. Hughes and S. V. Adve. Submitted for publication. Available as Department of Computer Science Technical Report UIUCDCS-R-2001-2221, University of Illinois at Urbana-Champaign, May, 2001.
  
  
• Code Transformations to Improve Memory Parallelism. Vijay S. Pai and Sarita Adve. To appear in Proceedings of the 32nd Annual IEEE/ACM International Symposium on Microarchitecture, November 1999. An extended version with some additional data appears as Technical Report #9909, Department of Electrical and Computer Engineering, Rice University, September 1999.
  
  
• Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions . Parthasarathy Ranganathan, Sarita Adve, and Norman P. Jouppi. In Proceedings of the 26th International Symposium on Computer Architecture, May 1999.
  
  
• Improving the Speed vs. Accuracy Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors. Murthy Durbhakula, Vijay S. Pai, and Sarita Adve. In Proceedings of the Fifth International Symposium on High Performance Computer Architecture, pages 23-32. January 1999. An extended version with some additional data appears as Technical Report #9802, Department of Electrical and Computer Engineering, Rice University, April 1998, revised December 1998.

• The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors , Vijay S. Pai, Parthasarathy Ranganathan, Hazim Abdel-Shafi, and Sarita Adve, In IEEE Transactions on Computers, special issue on caches, February 1999,pages 218-226.

• Recent Advances in Memory Consistency Models for Hardware Shared-Memory Systems, , Sarita V. Adve, Vijay S. Pai, and Parthasarathy Ranganathan, In Proceedings of the IEEE, special issue on distributed shared-memory, March 1999, pages 445-455.

• Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors. Parthasarathy Ranganathan, Kourosh Gharachorloo, Sarita V. Adve, and Luiz Andre Barroso. In Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems, October 1998.[Compressed PS] [BibTeX]

• Analytic Evaluation of Shared-Memory Systems with ILP Processors. Dan Sorin, Vijay S. Pai, Sarita V. Adve, Mary K. Vernon, and David Wood. In Proceedings of the 25th International Symposium on Computer Architecture, June 1998.

• RSIM Reference Manual. Version 1.0. Vijay S. Pai, Parthasarathy Ranganathan, and Sarita V. Adve. Department of Electrical and Computer Engineering, Rice University. Technical Report 9705. July 1997. [HTML] [Compressed PS] [BibTeX entry]

• Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap between Memory Consistency Models. Parthasarathy Ranganathan, Vijay S. Pai, and Sarita V. Adve. In Proceedings of the Ninth Annual ACM Symposium on Parallel Algorithms and Architectures, pages 199-210. June 1997. [Compressed PS] [BibTeX entry]

• The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems. Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abdel-Shafi, and Sarita V. Adve. In Proceedings of the 24th Annual International Symposium on Computer Architecture, pages 144-156. June 1997. [HTML] [Compressed PS] [BibTeX]

• The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology. Vijay S. Pai, Parthasarathy Ranganathan, and Sarita V. Adve. In Proceedings of the Third International Symposium on High Performance Computer Architecture, pages 72-83. February 1997. [HTML] [Compressed PS] [BibTeX]

• RSIM: An Execution-Driven Simulator for ILP-Based Shared-Memory Multiprocessors and Uniprocessors. Vijay S. Pai, Parthasarathy Ranganathan, and Sarita V. Adve. In Proceedings of the Third Workshop on Computer Architecture Education, February 1997. To appear in the IEEE Technical Committee on Computer Architecture newsletter, October 1997. [Compressed PS] [BibTeX]

• An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors. Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve, and Tracy Harton. In Proceedings of the Seventh International Conference on Architectural Support for Programming Languages and Operating Systems, pages 12-23. October 1996. [HTML] [Compressed PS] [BibTeX]